Udayan Sinha, Altera Corp.
Robert Anderson, MathWorks
Learn how you can target algorithms written in MATLAB to Intel FPGAs using HDL Coder. In this webinar, see how this workflow supports each phase of the FPGA design process including:
We also show how design teams can use a language-based FPGA design flow as well as how to integrate this workflow into Model-Based Design.
About the Presenters:
Robert Anderson is a Principal Application Engineer for signal processing and communications at MathWorks, with a focus on FPGA implementation. Robert has over 25 years of experience in hardware design and implementation. He earned his MS. in electrical and computer engineering from Northwestern University.
Udayan Sinha is a Product Marketing Engineer focusing on digital signal processing solutions at Altera. He holds a BSEE from the University of California, Davis.
Recorded: 30 Apr 2013