And there we go again!!!.... :)
Test | Status | Code Input and Output |
---|---|---|
1 | Pass |
filetext = fileread('vmultiply.m');
assert(isempty(strfind(filetext,'regexp')))
assert(isempty(strfind(filetext,'switch')))
|
2 | Pass |
v1 = [1 2];
v2 = [5 0 0];
v3_correct = [6 0 0 0];
assert(isequal(vmultiply(v1,v2),v3_correct))
assert(isequal(vmultiply(v2,v1),v3_correct))
|
3 | Pass |
v1 = [9 9];
v2 = [9 9];
v3_correct = [9 8 0 1];
assert(isequal(vmultiply(v1,v2),v3_correct))
assert(isequal(vmultiply(v2,v1),v3_correct))
|
4 | Pass |
v1 = [8 3 4 5 7 1 6 9 4 0 2 0 2 1 5 8 9 4];
v2 = [1 0 0 6 6 9 4 3 1 8 2 7 0 5 4 5 5];
v3_correct = [8 4 0 1 5 8 5 8 2 5 5 9 5 7 5 5 3 3 8 6 7 6 3 6 6 1 1 1 5 0 1 7 7 0];
assert(isequal(vmultiply(v1,v2),v3_correct))
assert(isequal(vmultiply(v2,v1),v3_correct))
|
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