F2837xD/F2838x/F2838x-M4 IPC Transmit
Transmit data to either core
- Library:
Embedded Coder Support Package for Texas Instruments C2000 Processors / F2837xD
Embedded Coder Support Package for Texas Instruments C2000 Processors / F2838x/ C28x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F2838x / M4
Description
The IPC Transmit block transmits data from one Core to the other.
Core1 transmits data to its allocated memory (Core1-to-Core2 Message RAM) and receives data from the allocated memory of Core2 (Core2-to-Core1 Message RAM). Similarly Core2 transmits data to its allocated memory (Core2-to-Core1 Message RAM) and receives data from allocated memory of Core1 (Core1-to-Core2 Message RAM). For F2838xD, Core1/Core2 can be CPU1,CPU2 or ARM Cortex-M4 (CM) and for F2837xD, Core1/Core2 can be CPU1 or CPU2.
If Core1 and Core2 are both C28x core, then the data and channel structure between two cores are allocated in Message RAM and the data array is allocated in Global Shared RAM. In C28x core, by default all the channel structures are created in Message RAM.
However, if one of the core is ARM Cortex M4 (applicable only for F2838x), then the data array is allocated only using Message RAM as global shared RAM is not available between cores. In order to accommodate more data, only required channel structures are created in Message RAM. Hence if the channel number used for transmit block in one core does not match with the receive block in other core the data transmission will not occur.
Ports
Input
Parameters
Model Examples
Version History
Introduced in R2018a