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F2807x/F2837xD/F2837xS/F28004x/F2838x/F2800xx CMPSS

Compare two input voltages on comparator pins

Since R2020a

  • CMPSS block

Libraries:
C2000 Microcontroller Blockset / F280013x
C2000 Microcontroller Blockset / F280015x
C2000 Microcontroller Blockset / F28002x
C2000 Microcontroller Blockset / F28003x
C2000 Microcontroller Blockset / F28004x
C2000 Microcontroller Blockset / F2807x
C2000 Microcontroller Blockset / F2837xD
C2000 Microcontroller Blockset / F2837xS
C2000 Microcontroller Blockset / F2838x / C28x
C2000 Microcontroller Blockset / F28p65x

Description

The Comparator Subsystem consists of two modules, Comparator High (COMPH) and Comparator Low (COMPH). Each module generates a high digital output when the voltage on the first input pin (positive input) is greater than the voltage on the second input pin (negative input). And each module generates a low digital output when the voltage on the first input pin (positive input) is less than the voltage on the second input pin (negative input).

The second input pin can either be the external pin or the DAC module.

Ports

Input

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12-bit DAC reference value is used for the second input pin of the comparator.

The DAC range is between 0 to 4095. Any value outside the range is saturated.

Dependencies

The DAC port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to DAC module

  • Specify DAC/RAMP parameter(s) Via is set to Input port

Ramp reference value used by the ramp generator to create a ramp reference voltage for the second input pin of the comparator.

The REF value should be in the range 0 to 65535. Any value outside the range is saturated.

Dependencies

The REF port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) Via is set to Input port

  • This port is available only for the COMPH module.

Ramp decrement value used by the ramp generator to create a ramp reference voltage for the second input pin of the comparator.

DEC range is between 0 to 65535. Any value outside the range is saturated.

Dependencies

The DEC port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) Via is set to Input port

  • This port is available only for the COMPH module.

Ramp delay value used by the ramp generator to create a ramp reference voltage for the second input pin of the comparator.

DLY range is between 0 to 8192. Any value outside the range is saturated.

Dependencies

The DLY port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) Via is set to Input port

  • This port is available only for the COMPH module.

Signal to clear the comparator latched output. Any value greater than 0 will clear the latch output.

Dependencies

The latch clear port appears only when Enable latch clear parameter is selected.

Output

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The comparator module outputs 1, if the voltage on the first input pin is greater than the second input pin. Otherwise, it outputs 0.

The comparator latch output is the tripped state of the CMPSS comparator after it is digitized and qualified by a digital filter.

The latched value can either be cleared by the software or PWMSYNC.

Dependencies

To enable this port, select the Enable latch output parameter.

Parameters

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Select which comparator module should be configured to output the comparison result.

Note

Number of modules available will vary for different processors.

The voltage source of second input pin (negative input pin), specified as either External pin or Internal DAC.

Select source of the internal DAC to generate voltage for the negative input pin, specified as either DAC module or RAMP module.

Dependencies

This parameter is available only for the COMPH module.

Select if the DAC or RAMP values are to be specified via the input port or from the dialog.

When you select input port, the block generates input ports for the comparator module.

When you set DAC source select parameter to DAC module, the block generates DAC port and when DAC source select is set to RAMP module it generates REF, DEC, and DLY port.

Parameter dependency

This parameter is available only for the COMPH module.

Specify the DAC value for internal DAC to generate the voltage on the negative input.

Specify the DAC initial value for internal DAC to generate the voltage on the negative input.

Dependencies

The DAC port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to DAC module

  • Specify DAC/RAMP parameter(s) Via is set to Input port

The RAMP reference value is in the range 0 to 65535. Any value outside the range is saturated.

The RAMP generator starts to decrement from the reference value.

Dependencies

The REF port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) Via is set to Dialog

  • This port is available only for the COMPH module.

The RAMP decrement value is in range 0 to 65535. Any value outside the range is saturated.

The RAMP generator decrements the RAMP reference value in steps of decrement value.

Dependencies

The DEC port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) Via is set to Dialog

  • This port is available only for the COMPH module.

The RAMP delay value is in range 0 to 8192. Any value outside the range is saturated.

The RAMP generator waits for the delay value before it starts to decrement the RAMP reference value in steps of RAMP decrement value.

Dependencies

The DLY port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) via is set to Dialog

  • This port is available only for the COMPH module.

The RAMP initial reference value is in the range 0 to 65535. Any value outside the range is saturated.

The RAMP generator starts to decrement from the reference value.

Dependencies

The REF port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) Via is set to Input port

  • This port is available only for the COMPH module.

The RAMP initial decrement value is in range 0 to 65535. Any value outside the range is saturated.

The RAMP generator decrements the RAMP reference value in steps of decrement value.

Dependencies

The DEC port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) Via is set to Input port

  • This port is available only for the COMPH module.

The RAMP initial delay value is in range 0 to 8192. Any value outside the range is saturated.

The RAMP generator waits for the delay value before it starts to decrement the RAMP reference value in steps of RAMP decrement value.

Dependencies

The DLY port appears only when parameter:

  • Second input is set to Internal DAC

  • DAC source select is set to RAMP module

  • Specify DAC/RAMP parameter(s) via is set to Input port

  • This port is available only for the COMPH module.

The latched value of the digital filter output of the comparator.

Select this parameter to enable the LTH port.

Latch clear signals to clear the comparator latch status signal. Any value greater than 0 will clear the latch signal.

Select this parameter to enable the LCLR port.

Use this parameter to specify the time interval between samples. To inherit sample time from an upstream block, set this parameter to -1.

Configuration of GPIO as Analog Pins

For TI F280013x and TI F280015x processors the following tables provides the mapping of GPIO pins which can be used as the analog pins for ADC and CMPSS blocks.

GPIOADCCMPSS
ModuleChannelModuleInput
GPIO12A20
C20
GPIO13A19
C19
GPIO20A17
C17
GPIO21A18
C18
GPIO28A16
C16
GPIO224A21Positive
C9
GPIO226C63Positive
GPIO227A92Positive
C84Positive
GPIO228A61Positive
GPIO230A102Negative
C10
GPIO242A33Negative
C5

For TI F28P65x processors the following tables provides the mapping of GPIO pins which can be used as the analog pins for ADC and CMPSS blocks.

GPIOADCCMPSS 
ModuleChannelModuleInput
GPIO198B3111Positive
C7
GPIO199B246Positive
C06Negative
GPIO200B256Positive
C1
GPIO201C911Positive
GPIO202C810Positive
GPIO203B3010Positive
C6
GPIO204B252Positive
C95Negative
GPIO205B285Positive
C410Negative
GPIO206B273Positive
C36Negative
GPIO207A307Positive
B67Negative
GPIO208A313Negative
B77Positive
GPIO209A67Positive
GPIO210 4 and 9Positive
A77Negative
GPIO211A88Positive
C24
GPIO212A95Positive
C258Negative
GPIO213A108Positive
C268Negative
GPIO214A118Positive
C27
GPIO215A285Positive
B45Negative
GPIO216A255Positive
B5
GPIO217B82Positive
C2810Negative
GPIO218B92Positive
C299Negative
GPIO219B104Positive
C304Negative

These pins are configured as analog pins if ADC or CMPSS blocks utilize them. Ensure that a GPIO pin is not used as both digital and analog pin. For example, if GPIO12 cannot be used in digital input or digital output block and as ADCA input channel 20.

Note

In some C28x processors, the GPIO pin selection for CMPSS blocks is done by configuring CMPHPMXSEL, CMPLPMXSEL, CMPHNMXSEL, and CMPLNMXSEL registers. Use the Register Read/Write block in Initialize function subsystem to write to these registers. For example, to use AIO233 as CMPSS1 Positive input for COMPH and COMPL, use Register Read/Write block in Initialize function subsystem to write to 3 to AnalogSubsysRegs.CMPHPMXSEL.bit.CMP1HPMXSEL and AnalogSubsysRegs.CMPLPMXSEL.bit.CMP1LPMXSEL bits.

Version History

Introduced in R2020a

See Also