This example shows how to read and write the memory locations on an Intel® FPGA board from MATLAB®.
Before you can use this example, you must have a design running on an FPGA board connected to the MATLAB host machine. The FPGA design must include an AXI manager IP that is customized for your FPGA vendor. The support package installation includes this IP. To include the IP in your project, see the Access FPGA External Memory Using AXI Manager example.
Create an AXI manager object. The object connects MATLAB with the FPGA board and confirms that the IP is present.
mem = aximanager('Intel')
aximanager with properties:
Vendor: 'Intel'
JTAGCableName: 'auto'
Write 10 addresses and then read data from a single location. By default, these functions auto-increment the address for each word of data.
writememory(mem,140,[10:19]);
rd_d = readmemory(mem,140,1)
Read data from 10 locations.
rd_d = readmemory(mem,140,10)
10 11 12 13 14 15 16 17 18 19
Read data 10 times from the same address by specifying that the AXI manager read all data from the same address (disabling auto-incrementation).
rd_d = readmemory(mem,140,10,'BurstType','Fixed')
10 10 10 10 10 10 10 10 10 10
Write data 10 times to the same address. In this case, the final value stored in address 140
is 29
.
writememory(mem,140,[20:29],'BurstType','Fixed');
rd_d = readmemory(mem,140,10)
29 11 12 13 14 15 16 17 18 19
Specify the address as a hexadecimal value. Specify for the function to cast the read data to a data type other than uint32
.
writememory(mem,0x1c,[0:4:64]);
rd_d = readmemory(mem,0x1c,16,'OutputDataType',numerictype(0,6,4))
Columns 1 through 10
0 0.2500 0.5000 0.7500 1.0000 1.2500 ...
1.5000 1.7500 2.0000 2.2500
Columns 11 through 16
2.5000 2.7500 3.0000 3.2500 3.5000 3.7500
DataTypeMode: Fixed-point: binary point scaling
Signedness: Unsigned
WordLength: 6
FractionLength: 4
When you no longer need to access the board, release the JTAG connection.