PCIe-4 Compliance Kit
Test the compliance of simulation models and topologies to the PCI Express generation 4 (PCIe-4) specification.
This PCIe compliance signal integrity kit includes all the transfer nets, topologies, generic buffer models and compliance rules for a PCIe-4 high-speed SerDes interface. This includes PCIe-4 technology IBIS-AMI models for the SerDes transmitter and receiver, PCIe-4 compliance masks and transfer nets preconfigured for TX and RX characterization that are customizable for a PCIe-4 embedded channel.
This kit enables you to insert a channel design and characterize and validate its performance using the specification masks to determine if the channel has a high confidence of success. If the channel does not meet the compliance masks or BER estimates, further investigation or redesign, along with simulation, will need to be performed to determine possible changes to meet compliance.
Open PCIe-4 Kit
Open the PCIe-4 kit in the Serial Link Designer app using the
openSignalIntegrityKit helper function.
Project Name: PCIe_Gen4_NVMe
Interface Name: PCIe_Gen4
Target Operating Frequency: 16.0 Gb/s, 8.0 GHz (Nyquist) (62.5ps)
The PCIe-4 kit defines five schematic sets:
All_Sheets: All schematic sheets
AIC: Add-In Card schematics only
SB_EMB: System Board embedded schematics only
SB_Slot: Slot configuration schematics
Tx_and_Rx_Tests: Return loss and package loss
For more information about the PCIe-4 channel compliance schematics, transfer net properties and compliance rules, refer to the document PCIe_gen4.pdf that is attached to this example as a supporting file.