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Unit Delay Resettable External IC (Obsolete)

Delay signal one sample period, with external Boolean reset and initial condition

Compatibility

Note

The Unit Delay Resettable External IC block is not recommended. This block was removed from the Discrete library in R2016b. In new models, use the Delay block (with parameters set appropriately). Existing models that contain the Unit Delay Resettable External IC block continue to work for backward compatibility.

  • Unit Delay Resettable External IC (Obsolete) block

Library

Additional Math & Discrete / Additional Discrete (until R2016b)

Description

The Unit Delay Resettable External IC block delays a signal one sample period.

The block can reset its state based on an external reset signal R. The block has two input ports, one for the input signal u and the other for the reset signal R. When the reset signal is false, the block outputs the input signal delayed by one time step. When the reset signal is true, the block resets the current state and its output to the Initial condition.

You specify the time between samples with the Sample time parameter. A setting of -1 means that the block inherits the Sample time.

Data Type Support

The Unit Delay Resettable External IC block accepts signals of the following data types:

  • Floating point

  • Built-in integer

  • Fixed point

  • Boolean

The data types of the inputs u and IC must be the same. The output has the same data type as u and IC.

For more information, see Data Types Supported by Simulink in the Simulink® documentation.

Parameters

Sample time

Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See Specify Sample Time in the online documentation for more information.

Characteristics

Data Types

Double | Single | Boolean | Base Integer | Fixed-Point

Sample Time

Specified in the Sample time parameter

Direct Feedthrough

No, of the input port

Yes, of the reset port

Yes, of the external IC port

Multidimensional Signals

No

Variable-Size Signals

No

Zero-Crossing Detection

No

Code Generation

Yes

Version History

Introduced before R2006a