"End-to-end system development with Simulink has streamlined our current design flow. We found virtually all bugs before hardware prototyping using Simulink and Mentor Graphics, and this cut development time in half."
Chie Sato, Yokogawa Electric Corporation
The expansion of broadband communication and multichannel digital television broadcasting has intensified the demand for high-speed networks. The routers, switches, and other networking technologies currently available do not function well at higher speeds. One solution is the optical packet network, a system in which data is transmitted over fiber optic lines as pulses of light.
It will be several years before the first of these networks is available, but Yokogawa® Electric Corporation has already developed two key optical network components. One is an ultra-high-speed optical switching device that helps prevent bottlenecks by enabling signals in optical circuits to be switched from one circuit to another. The other is an optical packet transmitter/receiver, known as Optical Media Manager, that provides an interface between the optical packet network and conventional networks.
Using MathWorks products and Model-Based Design, Yokogawa Electric reduced development time and costs by thoroughly testing these devices before prototyping them.
"End-to-end system development with Simulink® has streamlined our current design flow," says Yokogawa development team manager Chie Sato. "We found virtually all bugs before hardware prototyping using Simulink and Mentor Graphics® ModelSim®, and this cut development time in half."
Yokogawa Electric’s optical packet switch would switch the packet’s transfer route, “read” its label to determine its destination, and provide buffering and scheduling to prevent packet collision. The Optical Media Manager would work as a gateway between an optical packet network and Ethernet. It would provide functions for optical packet generation, reception, and labeling.
Development would focus on two key components of the system: a multiplexer/demultiplexer for packet data and error- correction code.
Yokogawa Electric would be designing the control logic and the hardware in parallel, reducing development time, but also increasing the risk of unexpected software problems during hardware prototyping.
The team needed software that would enable them to design, simulate, and test the control design with the hardware and implement it on FPGAs. They also needed to change specs during development without recoding, and to test the control software before prototyping.
Yokogawa Electric modeled the multiplexer/demultiplexer and the error-correction code in Simulink and used Stateflow® to model the optical packet switch’s control circuit specifications, packet data traffic, and packet scheduling. After converting the components manually into HDL, they used Mentor Graphics ModelSim to verify the control specifications. The engineers shared the Simulink model as they verified their HDL code.
Similarly, they developed the algorithm of the end-to-end Optical Media Manager in MATLAB® and Simulink, designed each processing component individually with HDL, and integrated all components in the Simulink environment with HDL Verifier™. Using Fixed-Point Designer™, they converted the model from floating point to fixed point and then simulated the entire system under various conditions to verify its behavior.
“By using Simulink to simulate our model, we verified the processing functionalities of the FPGA and determined the cause of design errors better than before,” Sato explains.
The first version of the optical packet switch and Optical Media Manager were released on time and within budget.
Yokogawa Electric is now developing new versions of these components, again using MathWorks products and Model-Based Design. They plan to use MathWorks tools to develop 40 Gbps optical packet network systems focusing on LAN applications.
To develop optical network devices for next-generation optical networks
Use MathWorks tools to develop the scheduling control system of an optical packet switch and to design and verify the signal processing algorithm of an optical media manager